# [−][src]Function core::arch::mips::__msa_ave_s_w

    pub unsafe fn __msa_ave_s_w(a: v4i32, b: v4i32) -> v4i32

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Vector Signed Average

The elements in vector `a` (four signed 32-bit integer numbers) are added to the elements in vector `b` (four signed 32-bit integer numbers). The addition is done signed with full precision, i.e. the result has one extra bit. Signed division by 2 (or arithmetic shift right by one bit) is performed before writing the result to vector (four signed 32-bit integer numbers).