# [−][src]Function core::arch::mips64::__msa_bneg_b

    pub unsafe fn __msa_bneg_b(a: v16u8, b: v16u8) -> v16u8

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Bit Negate

Negate (complement) one bit in each element of vector `a` (sixteen unsigned 8-bit integer numbers). The bit position is given by the elements in vector `b` (sixteen unsigned 8-bit integer numbers) modulo the size of the element in bits. The result is written to vector (sixteen unsigned 8-bit integer numbers).