# [−][src]Function core::arch::mips::__msa_fsule_d

    pub unsafe fn __msa_fsule_d(a: v2f64, b: v2f64) -> v2i64

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Vector Floating-Point Signaling Compare Unordered or Less or Equal

Set all bits to 1 in vector (two signed 64-bit integer numbers) elements if the corresponding `a` (two 64-bit floating point numbers) elements are unordered or less than or equal to `b` (two 64-bit floating point numbers) elements, otherwise set all bits to 0.