# [−][src]Function core::arch::mips64::__msa_maddv_h

    pub unsafe fn __msa_maddv_h(a: v8i16, b: v8i16, c: v8i16) -> v8i16

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Multiply and Add

The integer elements in vector `b` (eight signed 16-bit integer numbers) are multiplied by integer elements in vector `c` (eight signed 16-bit integer numbers) and added to the integer elements in vector `a` (eight signed 16-bit integer numbers). The most significant half of the multiplication result is discarded.