# [−][src]Function core::arch::mips64::__msa_fexdo_w

    pub unsafe fn __msa_fexdo_w(a: v2f64, b: v2f64) -> v4f32

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Floating-Point Down-Convert Interchange Format

The floating-point elements in vector `a` (two 64-bit floating point numbers) and vector `b` (two 64-bit floating point numbers) are down-converted to a smaller interchange format, i.e. from 64-bit to 32-bit, or from 32-bit to 16-bit. The result is written to vector (four 32-bit floating point numbers).