# [−][src]Function core::arch::mips64::__msa_ftint_s_w

    pub unsafe fn __msa_ftint_s_w(a: v4f32) -> v4i32

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Floating-Point Convert to Signed Integer

The elements in vector 'a' (four 32-bit floating point numbers) are rounded and converted to signed integer values based on the rounding mode bits RM in MSA Control and Status Register MSACSR. The result is written to vector (four signed 32-bit integer numbers).

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