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v2.2.0 (RP2040)
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uart.h
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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _HARDWARE_UART_H
#define _HARDWARE_UART_H
#include "pico.h"
#include "hardware/structs/uart.h"
// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_UART, Enable/disable assertions in the hardware_uart module, type=bool, default=0, group=hardware_uart
#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_UART
#ifdef PARAM_ASSERTIONS_ENABLED_UART // backwards compatibility with SDK < 2.0.0
#define PARAM_ASSERTIONS_ENABLED_HARDWARE_UART PARAM_ASSERTIONS_ENABLED_UART
#else
#define PARAM_ASSERTIONS_ENABLED_HARDWARE_UART 0
#endif
#endif
#ifdef __cplusplus
extern "C" {
#endif
// PICO_CONFIG: PICO_UART_ENABLE_CRLF_SUPPORT, Enable/disable CR/LF translation support, type=bool, default=1, group=hardware_uart
#ifndef PICO_UART_ENABLE_CRLF_SUPPORT
#define PICO_UART_ENABLE_CRLF_SUPPORT 1
#endif
// PICO_CONFIG: PICO_UART_DEFAULT_CRLF, Enable/disable CR/LF translation on UART, type=bool, default=0, depends=PICO_UART_ENABLE_CRLF_SUPPORT, group=hardware_uart
#ifndef PICO_UART_DEFAULT_CRLF
#define PICO_UART_DEFAULT_CRLF 0
#endif
// PICO_CONFIG: PICO_DEFAULT_UART, Define the default UART used for printf etc, min=0, max=1, default=Usually provided via board header, group=hardware_uart
// PICO_CONFIG: PICO_DEFAULT_UART_TX_PIN, Define the default UART TX pin, min=0, max=47 on RP2350B, 29 otherwise, default=Usually provided via board header, group=hardware_uart
// PICO_CONFIG: PICO_DEFAULT_UART_RX_PIN, Define the default UART RX pin, min=0, max=47 on RP2350B, 29 otherwise, default=Usually provided via board header, group=hardware_uart
// PICO_CONFIG: PICO_DEFAULT_UART_BAUD_RATE, Define the default UART baudrate, max=921600, default=115200, group=hardware_uart
#ifndef PICO_DEFAULT_UART_BAUD_RATE
#define PICO_DEFAULT_UART_BAUD_RATE 115200
#endif
// Currently always a pointer to hw but it might not be in the future
typedef struct uart_inst uart_inst_t;
#define uart0 ((uart_inst_t *)uart0_hw)
#define uart1 ((uart_inst_t *)uart1_hw)
#if !defined(PICO_DEFAULT_UART_INSTANCE) && defined(PICO_DEFAULT_UART)
#define PICO_DEFAULT_UART_INSTANCE() (__CONCAT(uart,PICO_DEFAULT_UART))
#endif
#ifdef PICO_DEFAULT_UART_INSTANCE
#define uart_default PICO_DEFAULT_UART_INSTANCE()
#endif
#ifndef UART_NUM
static_assert(NUM_UARTS == 2, "");
#define UART_NUM(uart) ((uart) == uart1)
#endif
#ifndef UART_INSTANCE
static_assert(NUM_UARTS == 2, "");
#define UART_INSTANCE(num) ((num) ? uart1 : uart0)
#endif
#ifndef UART_DREQ_NUM
#include "hardware/regs/dreq.h"
static_assert(DREQ_UART0_RX == DREQ_UART0_TX + 1, "");
static_assert(DREQ_UART1_RX == DREQ_UART1_TX + 1, "");
static_assert(DREQ_UART1_TX == DREQ_UART0_TX + 2, "");
#define UART_DREQ_NUM(uart, is_tx) ({ \
DREQ_UART0_TX + UART_NUM(uart) * 2 + !(is_tx); \
})
#endif
#ifndef UART_CLOCK_NUM
#define UART_CLOCK_NUM(uart) clk_peri
#endif
#ifndef UART_FUNCSEL_NUM
#if PICO_RP2040
#define UART_FUNCSEL_NUM(uart, gpio) GPIO_FUNC_UART
#else
#define UART_FUNCSEL_NUM(uart, gpio) ((gpio) & 0x2 ? GPIO_FUNC_UART_AUX : GPIO_FUNC_UART)
#endif
#endif
#ifndef UART_IRQ_NUM
#include "hardware/regs/intctrl.h"
static_assert(UART1_IRQ == UART0_IRQ + 1, "");
#define UART_IRQ_NUM(uart) (UART0_IRQ + UART_NUM(uart))
#endif
#ifndef UART_RESET_NUM
#include "hardware/resets.h"
#define UART_RESET_NUM(uart) (uart_get_index(uart) ? RESET_UART1 : RESET_UART0)
#endif
static inline uint uart_get_index(uart_inst_t *uart) {
invalid_params_if(HARDWARE_UART, uart != uart0 && uart != uart1);
return UART_NUM(uart);
}
static inline uart_inst_t *uart_get_instance(uint num) {
invalid_params_if(HARDWARE_UART, num >= NUM_UARTS);
return UART_INSTANCE(num);
}
static inline uart_hw_t *uart_get_hw(uart_inst_t *uart) {
uart_get_index(uart); // check it is a hw uart
return (uart_hw_t *)uart;
}
typedef enum {
UART_PARITY_NONE,
UART_PARITY_EVEN,
UART_PARITY_ODD
} uart_parity_t;
// ----------------------------------------------------------------------------
// Setup
uint uart_init(uart_inst_t *uart, uint baudrate);
void uart_deinit(uart_inst_t *uart);
uint uart_set_baudrate(uart_inst_t *uart, uint baudrate);
static inline void uart_set_hw_flow(uart_inst_t *uart, bool cts, bool rts) {
hw_write_masked(&uart_get_hw(uart)->cr,
(bool_to_bit(cts) << UART_UARTCR_CTSEN_LSB) | (bool_to_bit(rts) << UART_UARTCR_RTSEN_LSB),
UART_UARTCR_RTSEN_BITS | UART_UARTCR_CTSEN_BITS);
}
void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_bits, uart_parity_t parity);
static inline void uart_set_irqs_enabled(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
// Both UARTRXINTR (RX) and UARTRTINTR (RX timeout) interrupts are
// required for rx_has_data. RX asserts when >=4 characters are in the RX
// FIFO (for RXIFLSEL=0). RT asserts when there are >=1 characters and no
// more have been received for 32 bit periods.
uart_get_hw(uart)->imsc = (bool_to_bit(tx_needs_data) << UART_UARTIMSC_TXIM_LSB) |
(bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB) |
(bool_to_bit(rx_has_data) << UART_UARTIMSC_RTIM_LSB);
if (rx_has_data) {
// Set minimum threshold
hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_RXIFLSEL_LSB,
UART_UARTIFLS_RXIFLSEL_BITS);
}
if (tx_needs_data) {
// Set maximum threshold
hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_TXIFLSEL_LSB,
UART_UARTIFLS_TXIFLSEL_BITS);
}
}
// backwards compatibility with SDK version < 2.0.0
static inline void uart_set_irq_enables(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
uart_set_irqs_enabled(uart, rx_has_data, tx_needs_data);
}
static inline bool uart_is_enabled(uart_inst_t *uart) {
return uart_get_hw(uart)->cr & UART_UARTCR_UARTEN_BITS;
}
void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled);
// ----------------------------------------------------------------------------
// Generic input/output
static inline bool uart_is_writable(uart_inst_t *uart) {
return !(uart_get_hw(uart)->fr & UART_UARTFR_TXFF_BITS);
}
static inline void uart_tx_wait_blocking(uart_inst_t *uart) {
while (uart_get_hw(uart)->fr & UART_UARTFR_BUSY_BITS) tight_loop_contents();
}
static inline bool uart_is_readable(uart_inst_t *uart) {
// PL011 doesn't expose levels directly, so return values are only 0 or 1
return !(uart_get_hw(uart)->fr & UART_UARTFR_RXFE_BITS);
}
static inline void uart_write_blocking(uart_inst_t *uart, const uint8_t *src, size_t len) {
for (size_t i = 0; i < len; ++i) {
while (!uart_is_writable(uart))
tight_loop_contents();
uart_get_hw(uart)->dr = *src++;
}
}
static inline void uart_read_blocking(uart_inst_t *uart, uint8_t *dst, size_t len) {
for (size_t i = 0; i < len; ++i) {
while (!uart_is_readable(uart))
tight_loop_contents();
*dst++ = (uint8_t) uart_get_hw(uart)->dr;
}
}
// ----------------------------------------------------------------------------
// UART-specific operations and aliases
static inline void uart_putc_raw(uart_inst_t *uart, char c) {
uart_write_blocking(uart, (const uint8_t *) &c, 1);
}
static inline void uart_putc(uart_inst_t *uart, char c) {
#if PICO_UART_ENABLE_CRLF_SUPPORT
extern short uart_char_to_line_feed[NUM_UARTS];
if (uart_char_to_line_feed[uart_get_index(uart)] == c)
uart_putc_raw(uart, '\r');
#endif
uart_putc_raw(uart, c);
}
static inline void uart_puts(uart_inst_t *uart, const char *s) {
#if PICO_UART_ENABLE_CRLF_SUPPORT
bool last_was_cr = false;
while (*s) {
// Don't add extra carriage returns if one is present
if (last_was_cr)
uart_putc_raw(uart, *s);
else
uart_putc(uart, *s);
last_was_cr = *s++ == '\r';
}
#else
while (*s)
uart_putc(uart, *s++);
#endif
}
static inline char uart_getc(uart_inst_t *uart) {
char c;
uart_read_blocking(uart, (uint8_t *) &c, 1);
return c;
}
void uart_set_break(uart_inst_t *uart, bool en);
void uart_set_translate_crlf(uart_inst_t *uart, bool translate);
static inline void uart_default_tx_wait_blocking(void) {
#ifdef uart_default
uart_tx_wait_blocking(uart_default);
#else
assert(false);
#endif
}
bool uart_is_readable_within_us(uart_inst_t *uart, uint32_t us);
static inline uint uart_get_dreq_num(uart_inst_t *uart, bool is_tx) {
return UART_DREQ_NUM(uart, is_tx);
}
static inline uint uart_get_reset_num(uart_inst_t *uart) {
return UART_RESET_NUM(uart);
}
// backwards compatibility
static inline uint uart_get_dreq(uart_inst_t *uart, bool is_tx) {
return uart_get_dreq_num(uart, is_tx);
}
#ifdef __cplusplus
}
#endif
#endif
hw_write_masked
static __force_inline void hw_write_masked(io_rw_32 *addr, uint32_t values, uint32_t write_mask)
Set new values for a sub-set of the bits in a HW register.
Definition address_mapped.h:171
DREQ_UART0_RX
@ DREQ_UART0_RX
Select UART0's RX FIFO as DREQ.
Definition dreq.h:88
DREQ_UART0_TX
@ DREQ_UART0_TX
Select UART0's TX FIFO as DREQ.
Definition dreq.h:87
DREQ_UART1_TX
@ DREQ_UART1_TX
Select UART1's TX FIFO as DREQ.
Definition dreq.h:89
DREQ_UART1_RX
@ DREQ_UART1_RX
Select UART1's RX FIFO as DREQ.
Definition dreq.h:90
UART1_IRQ
@ UART1_IRQ
Select UART1's IRQ output.
Definition intctrl.h:75
UART0_IRQ
@ UART0_IRQ
Select UART0's IRQ output.
Definition intctrl.h:74
uart_is_readable_within_us
bool uart_is_readable_within_us(uart_inst_t *uart, uint32_t us)
Wait for up to a certain number of microseconds for the RX FIFO to be non empty.
Definition uart.c:229
uart_get_index
static uint uart_get_index(uart_inst_t *uart)
Convert UART instance to hardware instance number.
Definition uart.h:218
uart_get_reset_num
static uint uart_get_reset_num(uart_inst_t *uart)
Return the reset_num_t to use to reset a particular UART instance.
Definition uart.h:606
uart_set_format
void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_bits, uart_parity_t parity)
Set UART data format.
Definition uart.c:183
UART_DREQ_NUM
#define UART_DREQ_NUM(uart, is_tx)
Returns the dreq_num_t used for pacing DMA transfers to or from this UART instance....
Definition uart.h:152
UART_NUM
#define UART_NUM(uart)
Returns the UART number for a UART instance.
Definition uart.h:122
uart_set_irqs_enabled
static void uart_set_irqs_enabled(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data)
Enable/Disable UART interrupt outputs.
Definition uart.h:360
uart_putc
static void uart_putc(uart_inst_t *uart, char c)
Write single character to UART for transmission, with optional CR/LF conversions.
Definition uart.h:507
uart_get_hw
static uart_hw_t * uart_get_hw(uart_inst_t *uart)
Get the real hardware UART instance from a UART instance.
Definition uart.h:243
uart_is_readable
static bool uart_is_readable(uart_inst_t *uart)
Determine whether data is waiting in the RX FIFO.
Definition uart.h:442
uart0
#define uart0
Identifier for UART instance 0.
Definition uart.h:86
uart_set_translate_crlf
void uart_set_translate_crlf(uart_inst_t *uart, bool translate)
Set CR/LF conversion on UART.
Definition uart.c:221
uart_set_hw_flow
static void uart_set_hw_flow(uart_inst_t *uart, bool cts, bool rts)
Set UART flow control CTS/RTS.
Definition uart.h:321
uart_init
uint uart_init(uart_inst_t *uart, uint baudrate)
Initialise a UART.
Definition uart.c:42
uart_is_enabled
static bool uart_is_enabled(uart_inst_t *uart)
Test if specific UART is enabled.
Definition uart.h:391
uart_putc_raw
static void uart_putc_raw(uart_inst_t *uart, char c)
Write single character to UART for transmission.
Definition uart.h:495
uart_getc
static char uart_getc(uart_inst_t *uart)
Read a single character from the UART.
Definition uart.h:549
uart_parity_t
uart_parity_t
UART Parity enumeration.
Definition uart.h:251
uart_deinit
void uart_deinit(uart_inst_t *uart)
DeInitialise a UART.
Definition uart.c:95
uart_puts
static void uart_puts(uart_inst_t *uart, const char *s)
Write string to UART for transmission, doing any CR/LF conversions.
Definition uart.h:524
uart_is_writable
static bool uart_is_writable(uart_inst_t *uart)
Determine if space is available in the TX FIFO.
Definition uart.h:422
uart_default_tx_wait_blocking
static void uart_default_tx_wait_blocking(void)
Wait for the default UART's TX FIFO to be drained.
Definition uart.h:574
uart_set_baudrate
uint uart_set_baudrate(uart_inst_t *uart, uint baudrate)
Set UART baud rate.
Definition uart.c:155
uart_set_fifo_enabled
void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled)
Enable/Disable the FIFOs on specified UART.
Definition uart.c:199
uart1
#define uart1
Identifier for UART instance 1.
Definition uart.h:87
uart_write_blocking
static void uart_write_blocking(uart_inst_t *uart, const uint8_t *src, size_t len)
Write to the UART for transmission.
Definition uart.h:459
UART_INSTANCE
#define UART_INSTANCE(num)
Returns the UART instance with the given UART number.
Definition uart.h:135
uart_set_break
void uart_set_break(uart_inst_t *uart, bool en)
Assert a break condition on the UART transmission.
Definition uart.c:210
uart_read_blocking
static void uart_read_blocking(uart_inst_t *uart, uint8_t *dst, size_t len)
Read from the UART.
Definition uart.h:476
uart_get_dreq_num
static uint uart_get_dreq_num(uart_inst_t *uart, bool is_tx)
Return the dreq_num_t to use for pacing transfers to/from a particular UART instance.
Definition uart.h:597
uart_get_instance
static uart_inst_t * uart_get_instance(uint num)
Get the UART instance from an instance number.
Definition uart.h:229
uart_tx_wait_blocking
static void uart_tx_wait_blocking(uart_inst_t *uart)
Wait for the UART TX fifo to be drained.
Definition uart.h:431
UART_RESET_NUM
#define UART_RESET_NUM(uart)
Returns the reset_num_t used to reset a given UART instance.
Definition uart.h:209
tight_loop_contents
static __force_inline void tight_loop_contents(void)
No-op function for the body of tight loops.
Definition common.h:74
pico.h
resets.h
uart_hw_t
Definition uart.h:26