@web-font-path: "roboto-debian.css";
v2.2.0 (RP2040)
Loading...
Searching...
No Matches
gpio.h
Go to the documentation of this file.
/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _HARDWARE_GPIO_H
#define _HARDWARE_GPIO_H
#include "pico.h"
#include "hardware/structs/sio.h"
#include "hardware/structs/pads_bank0.h"
#include "hardware/structs/io_bank0.h"
#include "hardware/irq.h"
// PICO_CONFIG: PICO_USE_GPIO_COPROCESSOR, Enable/disable use of the GPIO coprocessor for GPIO access, type=bool, default=1, group=hardware_gpio
#if !defined(PICO_USE_GPIO_COPROCESSOR) && HAS_GPIO_COPROCESSOR
#define PICO_USE_GPIO_COPROCESSOR 1
#endif
#if PICO_USE_GPIO_COPROCESSOR
#include "hardware/gpio_coproc.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_GPIO, Enable/disable assertions in the hardware_gpio module, type=bool, default=0, group=hardware_gpio
#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_GPIO
#ifdef PARAM_ASSERTIONS_ENABLED_GPIO // backwards compatibility with SDK < 2.0.0
#define PARAM_ASSERTIONS_ENABLED_HARDWARE_GPIO PARAM_ASSERTIONS_ENABLED_GPIO
#else
#define PARAM_ASSERTIONS_ENABLED_HARDWARE_GPIO 0
#endif
#endif
enum gpio_dir {
GPIO_OUT = 1u,
GPIO_IN = 0u,
};
enum gpio_irq_level {
GPIO_IRQ_LEVEL_LOW = 0x1u,
GPIO_IRQ_LEVEL_HIGH = 0x2u,
GPIO_IRQ_EDGE_FALL = 0x4u,
GPIO_IRQ_EDGE_RISE = 0x8u,
};
typedef void (*gpio_irq_callback_t)(uint gpio, uint32_t event_mask);
enum gpio_override {
GPIO_OVERRIDE_NORMAL = 0,
GPIO_OVERRIDE_INVERT = 1,
GPIO_OVERRIDE_LOW = 2,
GPIO_OVERRIDE_HIGH = 3,
};
enum gpio_slew_rate {
GPIO_SLEW_RATE_SLOW = 0,
GPIO_SLEW_RATE_FAST = 1
};
enum gpio_drive_strength {
GPIO_DRIVE_STRENGTH_2MA = 0,
GPIO_DRIVE_STRENGTH_4MA = 1,
GPIO_DRIVE_STRENGTH_8MA = 2,
GPIO_DRIVE_STRENGTH_12MA = 3
};
static inline void check_gpio_param(__unused uint gpio) {
invalid_params_if(HARDWARE_GPIO, gpio >= NUM_BANK0_GPIOS);
}
// ----------------------------------------------------------------------------
// Pad Controls + IO Muxing
// ----------------------------------------------------------------------------
// Declarations for gpio.c
void gpio_set_function(uint gpio, gpio_function_t fn);
void gpio_set_function_masked(uint32_t gpio_mask, gpio_function_t fn);
void gpio_set_function_masked64(uint64_t gpio_mask, gpio_function_t fn);
gpio_function_t gpio_get_function(uint gpio);
void gpio_set_pulls(uint gpio, bool up, bool down);
static inline void gpio_pull_up(uint gpio) {
gpio_set_pulls(gpio, true, false);
}
static inline bool gpio_is_pulled_up(uint gpio) {
return (pads_bank0_hw->io[gpio] & PADS_BANK0_GPIO0_PUE_BITS) != 0;
}
static inline void gpio_pull_down(uint gpio) {
gpio_set_pulls(gpio, false, true);
}
static inline bool gpio_is_pulled_down(uint gpio) {
return (pads_bank0_hw->io[gpio] & PADS_BANK0_GPIO0_PDE_BITS) != 0;
}
static inline void gpio_disable_pulls(uint gpio) {
gpio_set_pulls(gpio, false, false);
}
void gpio_set_irqover(uint gpio, uint value);
void gpio_set_outover(uint gpio, uint value);
void gpio_set_inover(uint gpio, uint value);
void gpio_set_oeover(uint gpio, uint value);
void gpio_set_input_enabled(uint gpio, bool enabled);
void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled);
bool gpio_is_input_hysteresis_enabled(uint gpio);
void gpio_set_slew_rate(uint gpio, enum gpio_slew_rate slew);
enum gpio_slew_rate gpio_get_slew_rate(uint gpio);
void gpio_set_drive_strength(uint gpio, enum gpio_drive_strength drive);
enum gpio_drive_strength gpio_get_drive_strength(uint gpio);
void gpio_set_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
// PICO_CONFIG: GPIO_IRQ_CALLBACK_ORDER_PRIORITY, IRQ priority order of the default IRQ callback, min=0, max=255, default=PICO_SHARED_IRQ_HANDLER_LOWEST_ORDER_PRIORITY, group=hardware_gpio
#ifndef GPIO_IRQ_CALLBACK_ORDER_PRIORITY
#define GPIO_IRQ_CALLBACK_ORDER_PRIORITY PICO_SHARED_IRQ_HANDLER_LOWEST_ORDER_PRIORITY
#endif
// PICO_CONFIG: GPIO_RAW_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY, IRQ priority order of raw IRQ handlers if the priority is not specified, min=0, max=255, default=PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY, group=hardware_gpio
#ifndef GPIO_RAW_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY
#define GPIO_RAW_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY
#endif
void gpio_set_irq_callback(gpio_irq_callback_t callback);
void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t event_mask, bool enabled, gpio_irq_callback_t callback);
void gpio_set_dormant_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
static inline uint32_t gpio_get_irq_event_mask(uint gpio) {
check_gpio_param(gpio);
io_bank0_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ?
&io_bank0_hw->proc1_irq_ctrl : &io_bank0_hw->proc0_irq_ctrl;
io_ro_32 *status_reg = &irq_ctrl_base->ints[gpio >> 3u];
return (*status_reg >> (4 * (gpio & 7u))) & 0xfu;
}
static inline void gpio_acknowledge_irq(uint gpio, uint32_t event_mask) {
check_gpio_param(gpio);
io_bank0_hw->intr[gpio / 8] = event_mask << (4 * (gpio % 8));
}
void gpio_add_raw_irq_handler_with_order_priority_masked(uint32_t gpio_mask, irq_handler_t handler, uint8_t order_priority);
void gpio_add_raw_irq_handler_with_order_priority_masked64(uint64_t gpio_mask, irq_handler_t handler, uint8_t order_priority);
static inline void gpio_add_raw_irq_handler_with_order_priority(uint gpio, irq_handler_t handler, uint8_t order_priority) {
check_gpio_param(gpio);
#if NUM_BANK0_GPIOS > 32
gpio_add_raw_irq_handler_with_order_priority_masked64(1ull << gpio, handler, order_priority);
#else
gpio_add_raw_irq_handler_with_order_priority_masked(1u << gpio, handler, order_priority);
#endif
}
void gpio_add_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler);
void gpio_add_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler);
static inline void gpio_add_raw_irq_handler(uint gpio, irq_handler_t handler) {
check_gpio_param(gpio);
#if NUM_BANK0_GPIOS > 32
gpio_add_raw_irq_handler_masked64(1ull << gpio, handler);
#else
gpio_add_raw_irq_handler_masked(1u << gpio, handler);
#endif
}
void gpio_remove_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler);
void gpio_remove_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler);
static inline void gpio_remove_raw_irq_handler(uint gpio, irq_handler_t handler) {
check_gpio_param(gpio);
#if NUM_BANK0_GPIOS > 32
gpio_remove_raw_irq_handler_masked64(1ull << gpio, handler);
#else
gpio_remove_raw_irq_handler_masked(1u << gpio, handler);
#endif
}
void gpio_init(uint gpio);
void gpio_deinit(uint gpio);
void gpio_init_mask(uint gpio_mask);
// ----------------------------------------------------------------------------
// Input
// ----------------------------------------------------------------------------
static inline bool gpio_get(uint gpio) {
#if NUM_BANK0_GPIOS <= 32
return sio_hw->gpio_in & (1u << gpio);
#else
if (gpio < 32) {
return sio_hw->gpio_in & (1u << gpio);
} else {
return sio_hw->gpio_hi_in & (1u << (gpio - 32));
}
#endif
}
static inline uint32_t gpio_get_all(void) {
#if PICO_USE_GPIO_COPROCESSOR
return gpioc_lo_in_get();
#else
return sio_hw->gpio_in;
#endif
}
static inline uint64_t gpio_get_all64(void) {
#if PICO_USE_GPIO_COPROCESSOR
return gpioc_hilo_in_get();
#elif NUM_BANK0_GPIOS <= 32
return sio_hw->gpio_in;
#else
return sio_hw->gpio_in | (((uint64_t)sio_hw->gpio_hi_in) << 32u);
#endif
}
// ----------------------------------------------------------------------------
// Output
// ----------------------------------------------------------------------------
static inline void gpio_set_mask(uint32_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_out_set(mask);
#else
sio_hw->gpio_set = mask;
#endif
}
static inline void gpio_set_mask64(uint64_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_out_set(mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_set = (uint32_t)mask;
#else
sio_hw->gpio_set = (uint32_t)mask;
sio_hw->gpio_hi_set = (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_set_mask_n(uint n, uint32_t mask) {
if (!n) {
gpio_set_mask(mask);
} else if (n == 1) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hi_out_set(mask);
#elif NUM_BANK0_GPIOS >= 32
sio_hw->gpio_hi_set = mask;
#endif
}
}
static inline void gpio_clr_mask(uint32_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_out_clr(mask);
#else
sio_hw->gpio_clr = mask;
#endif
}
static inline void gpio_clr_mask64(uint64_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_out_clr(mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_clr = (uint32_t)mask;
#else
sio_hw->gpio_clr = (uint32_t)mask;
sio_hw->gpio_hi_clr = (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_clr_mask_n(uint n, uint32_t mask) {
if (!n) {
gpio_clr_mask(mask);
} else if (n == 1) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hi_out_clr(mask);
#elif NUM_BANK0_GPIOS >= 32
sio_hw->gpio_hi_clr = mask;
#endif
}
}
static inline void gpio_xor_mask(uint32_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_out_xor(mask);
#else
sio_hw->gpio_togl = mask;
#endif
}
static inline void gpio_xor_mask64(uint64_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_out_xor(mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_togl = (uint32_t)mask;
#else
sio_hw->gpio_togl = (uint32_t)mask;
sio_hw->gpio_hi_togl = (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_xor_mask_n(uint n, uint32_t mask) {
if (!n) {
gpio_xor_mask(mask);
} else if (n == 1) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hi_out_xor(mask);
#elif NUM_BANK0_GPIOS >= 32
sio_hw->gpio_hi_togl = mask;
#endif
}
}
static inline void gpio_put_masked(uint32_t mask, uint32_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_out_xor((gpioc_lo_out_get() ^ value) & mask);
#else
sio_hw->gpio_togl = (sio_hw->gpio_out ^ value) & mask;
#endif
}
static inline void gpio_put_masked64(uint64_t mask, uint64_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_out_xor((gpioc_hilo_out_get() ^ value) & mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_togl = (sio_hw->gpio_out ^ (uint32_t)value) & (uint32_t)mask;
#else
sio_hw->gpio_togl = (sio_hw->gpio_out ^ (uint32_t)value) & (uint32_t)mask;
sio_hw->gpio_hi_togl = (sio_hw->gpio_hi_out ^ (uint32_t)(value>>32u)) & (uint32_t)(mask>>32u);
#endif
}
static inline void gpio_put_masked_n(uint n, uint32_t mask, uint32_t value) {
if (!n) {
gpio_put_masked(mask, value);
} else if (n == 1) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hi_out_xor((gpioc_hi_out_get() ^ value) & mask);
#else
sio_hw->gpio_hi_togl = (sio_hw->gpio_hi_out ^ value) & mask;
#endif
}
}
static inline void gpio_put_all(uint32_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_out_put(value);
#else
sio_hw->gpio_out = value;
#endif
}
static inline void gpio_put_all64(uint64_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_out_put(value);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_out = (uint32_t)value;
#else
sio_hw->gpio_out = (uint32_t)value;
sio_hw->gpio_hi_out = (uint32_t)(value >> 32u);
#endif
}
static inline void gpio_put(uint gpio, bool value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_bit_out_put(gpio, value);
#elif NUM_BANK0_GPIOS <= 32
uint32_t mask = 1ul << gpio;
if (value)
gpio_set_mask(mask);
else
gpio_clr_mask(mask);
#else
uint32_t mask = 1ul << (gpio & 0x1fu);
if (gpio < 32) {
if (value) {
sio_hw->gpio_set = mask;
} else {
sio_hw->gpio_clr = mask;
}
} else {
if (value) {
sio_hw->gpio_hi_set = mask;
} else {
sio_hw->gpio_hi_clr = mask;
}
}
#endif
}
static inline bool gpio_get_out_level(uint gpio) {
#if NUM_BANK0_GPIOS <= 32
return sio_hw->gpio_out & (1u << gpio);
#else
uint32_t bits = gpio < 32 ? sio_hw->gpio_out : sio_hw->gpio_hi_out;
return bits & (1u << (gpio & 0x1fu));
#endif
}
// ----------------------------------------------------------------------------
// Direction
// ----------------------------------------------------------------------------
static inline void gpio_set_dir_out_masked(uint32_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_oe_set(mask);
#else
sio_hw->gpio_oe_set = mask;
#endif
}
static inline void gpio_set_dir_out_masked64(uint64_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_oe_set(mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_oe_set = mask;
#else
sio_hw->gpio_oe_set = (uint32_t)mask;
sio_hw->gpio_hi_oe_set = (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_set_dir_in_masked(uint32_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_oe_clr(mask);
#else
sio_hw->gpio_oe_clr = mask;
#endif
}
static inline void gpio_set_dir_in_masked64(uint64_t mask) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_oe_clr(mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_oe_clr = mask;
#else
sio_hw->gpio_oe_clr = (uint32_t)mask;
sio_hw->gpio_hi_oe_clr = (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_set_dir_masked(uint32_t mask, uint32_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_oe_xor((gpioc_lo_oe_get() ^ value) & mask);
#else
sio_hw->gpio_oe_togl = (sio_hw->gpio_oe ^ value) & mask;
#endif
}
static inline void gpio_set_dir_masked64(uint64_t mask, uint64_t value) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_oe_xor((gpioc_hilo_oe_get() ^ value) & mask);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_oe_togl = (sio_hw->gpio_oe ^ (uint32_t)value) & (uint32_t)mask;
#else
sio_hw->gpio_oe_togl = (sio_hw->gpio_oe ^ (uint32_t)value) & (uint32_t)mask;
sio_hw->gpio_hi_oe_togl = (sio_hw->gpio_hi_oe ^ (uint32_t)(value >> 32u)) & (uint32_t)(mask >> 32u);
#endif
}
static inline void gpio_set_dir_all_bits(uint32_t values) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_lo_oe_put(values);
#else
sio_hw->gpio_oe = values;
#endif
}
static inline void gpio_set_dir_all_bits64(uint64_t values) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_hilo_oe_put(values);
#elif NUM_BANK0_GPIOS <= 32
sio_hw->gpio_oe = (uint32_t)values;
#else
sio_hw->gpio_oe = (uint32_t)values;
sio_hw->gpio_hi_oe = (uint32_t)(values >> 32u);
#endif
}
static inline void gpio_set_dir(uint gpio, bool out) {
#if PICO_USE_GPIO_COPROCESSOR
gpioc_bit_oe_put(gpio, out);
#elif PICO_RP2040 || NUM_BANK0_GPIOS <= 32
uint32_t mask = 1ul << gpio;
if (out)
gpio_set_dir_out_masked(mask);
else
gpio_set_dir_in_masked(mask);
#else
uint32_t mask = 1u << (gpio & 0x1fu);
if (gpio < 32) {
if (out) {
sio_hw->gpio_oe_set = mask;
} else {
sio_hw->gpio_oe_clr = mask;
}
} else {
if (out) {
sio_hw->gpio_hi_oe_set = mask;
} else {
sio_hw->gpio_hi_oe_clr = mask;
}
}
#endif
}
static inline bool gpio_is_dir_out(uint gpio) {
#if NUM_BANK0_GPIOS <= 32
return sio_hw->gpio_oe & (1u << (gpio));
#else
uint32_t bits = gpio < 32 ? sio_hw->gpio_oe : sio_hw->gpio_hi_oe;
return bits & (1u << (gpio & 0x1fu));
#endif
}
static inline uint gpio_get_dir(uint gpio) {
return gpio_is_dir_out(gpio); // note GPIO_OUT is 1/true and GPIO_IN is 0/false anyway
}
#if PICO_SECURE
static inline void gpio_assign_to_ns(uint gpio, bool ns) {
check_gpio_param(gpio);
if (ns) hw_set_bits(&accessctrl_hw->gpio_nsmask[gpio/32], 1u << (gpio & 0x1fu));
else hw_clear_bits(&accessctrl_hw->gpio_nsmask[gpio/32], 1u << (gpio & 0x1fu));
}
#endif
extern void gpio_debug_pins_init(void);
#ifdef __cplusplus
}
#endif
// PICO_CONFIG: PICO_DEBUG_PIN_BASE, First pin to use for debug output (if enabled), min=0, max=31 on RP2350B, 29 otherwise, default=19, group=hardware_gpio
#ifndef PICO_DEBUG_PIN_BASE
#define PICO_DEBUG_PIN_BASE 19u
#endif
// PICO_CONFIG: PICO_DEBUG_PIN_COUNT, Number of pins to use for debug output (if enabled), min=1, max=32 on RP2350B, 30 otherwise, default=3, group=hardware_gpio
#ifndef PICO_DEBUG_PIN_COUNT
#define PICO_DEBUG_PIN_COUNT 3u
#endif
#ifndef __cplusplus
// note these two macros may only be used once per and only apply per compilation unit (hence the CU_)
#define CU_REGISTER_DEBUG_PINS(...) enum __unused DEBUG_PIN_TYPE { _none = 0, __VA_ARGS__ }; static enum DEBUG_PIN_TYPE __selected_debug_pins;
#define CU_SELECT_DEBUG_PINS(x) static enum DEBUG_PIN_TYPE __selected_debug_pins = (x);
#define DEBUG_PINS_ENABLED(p) (__selected_debug_pins == (p))
#else
#define CU_REGISTER_DEBUG_PINS(p...) \
enum DEBUG_PIN_TYPE { _none = 0, p }; \
template <enum DEBUG_PIN_TYPE> class __debug_pin_settings { \
public: \
static inline bool enabled() { return false; } \
};
#define CU_SELECT_DEBUG_PINS(x) template<> inline bool __debug_pin_settings<x>::enabled() { return true; };
#define DEBUG_PINS_ENABLED(p) (__debug_pin_settings<p>::enabled())
#endif
#define DEBUG_PINS_SET(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_set_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
#define DEBUG_PINS_CLR(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_clr_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
#define DEBUG_PINS_XOR(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_xor_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
#endif // _GPIO_H_
gpio_dir
gpio_dir
Definition gpio.h:170
GPIO_OUT
@ GPIO_OUT
set GPIO to output
Definition gpio.h:171
GPIO_IN
@ GPIO_IN
set GPIO to input
Definition gpio.h:172
hw_set_bits
static __force_inline void hw_set_bits(io_rw_32 *addr, uint32_t mask)
Atomically set the specified bits to 1 in a HW register.
Definition address_mapped.h:135
hw_clear_bits
static __force_inline void hw_clear_bits(io_rw_32 *addr, uint32_t mask)
Atomically clear the specified bits to 0 in a HW register.
Definition address_mapped.h:145
gpio_add_raw_irq_handler_with_order_priority
static void gpio_add_raw_irq_handler_with_order_priority(uint gpio, irq_handler_t handler, uint8_t order_priority)
Adds a raw GPIO IRQ handler for a specific GPIO on the current core.
Definition gpio.h:677
gpio_set_irq_enabled
void gpio_set_irq_enabled(uint gpio, uint32_t event_mask, bool enabled)
Enable or disable specific interrupt events for specified GPIO.
Definition gpio.c:186
gpio_get_out_level
static bool gpio_get_out_level(uint gpio)
Determine whether a GPIO is currently driven high or low.
Definition gpio.h:1198
gpio_put_all64
static void gpio_put_all64(uint64_t value)
Drive all pins simultaneously.
Definition gpio.h:1138
gpio_set_dormant_irq_enabled
void gpio_set_dormant_irq_enabled(uint gpio, uint32_t event_mask, bool enabled)
Enable dormant wake up interrupt for specified GPIO and events.
Definition gpio.c:250
gpio_set_drive_strength
void gpio_set_drive_strength(uint gpio, enum gpio_drive_strength drive)
Set drive strength for a specified GPIO.
Definition gpio.c:138
gpio_function_t
enum gpio_function_rp2040 gpio_function_t
GPIO pin function selectors on RP2040 (used as typedef gpio_function_t).
gpio_get_drive_strength
enum gpio_drive_strength gpio_get_drive_strength(uint gpio)
Determine current drive strength for a specified GPIO.
Definition gpio.c:146
gpio_drive_strength
gpio_drive_strength
Drive strength levels for GPIO outputs.
Definition gpio.h:237
gpio_set_input_hysteresis_enabled
void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled)
Enable/disable GPIO input hysteresis (Schmitt trigger).
Definition gpio.c:106
gpio_set_function
void gpio_set_function(uint gpio, gpio_function_t fn)
Select GPIO function.
Definition gpio.c:38
gpio_get_function
gpio_function_t gpio_get_function(uint gpio)
Determine current GPIO function.
Definition gpio.c:56
gpio_add_raw_irq_handler_masked64
void gpio_add_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler)
Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:234
gpio_set_oeover
void gpio_set_oeover(uint gpio, uint value)
Select GPIO output enable override.
Definition gpio.c:98
gpio_remove_raw_irq_handler_masked
void gpio_remove_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler)
Removes a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:238
gpio_get_dir
static uint gpio_get_dir(uint gpio)
Get a specific GPIO direction.
Definition gpio.h:1398
gpio_set_dir_masked64
static void gpio_set_dir_masked64(uint64_t mask, uint64_t value)
Set multiple GPIO directions.
Definition gpio.h:1303
gpio_add_raw_irq_handler
static void gpio_add_raw_irq_handler(uint gpio, irq_handler_t handler)
Adds a raw GPIO IRQ handler for a specific GPIO on the current core.
Definition gpio.h:776
gpio_init_mask
void gpio_init_mask(uint gpio_mask)
Initialise multiple GPIOs (enabled I/O and set func to GPIO_FUNC_SIO).
Definition gpio.c:283
gpio_pull_up
static void gpio_pull_up(uint gpio)
Set specified GPIO to be pulled up.
Definition gpio.h:304
gpio_set_function_masked
void gpio_set_function_masked(uint32_t gpio_mask, gpio_function_t fn)
Select the function for multiple GPIOs.
Definition gpio.c:292
gpio_set_irq_callback
void gpio_set_irq_callback(gpio_irq_callback_t callback)
Set the generic callback used for GPIO IRQ events for the current core.
Definition gpio.c:205
gpio_get_slew_rate
enum gpio_slew_rate gpio_get_slew_rate(uint gpio)
Determine current slew rate for a specified GPIO.
Definition gpio.c:128
gpio_remove_raw_irq_handler
static void gpio_remove_raw_irq_handler(uint gpio, irq_handler_t handler)
Removes a raw GPIO IRQ handler for the specified GPIO on the current core.
Definition gpio.h:824
gpio_deinit
void gpio_deinit(uint gpio)
Resets a GPIO back to the NULL function, i.e. disables it.
Definition gpio.c:279
gpio_set_dir_all_bits
static void gpio_set_dir_all_bits(uint32_t values)
Set direction of all pins simultaneously.
Definition gpio.h:1320
gpio_is_pulled_down
static bool gpio_is_pulled_down(uint gpio)
Determine if the specified GPIO is pulled down.
Definition gpio.h:333
gpio_set_inover
void gpio_set_inover(uint gpio, uint value)
Select GPIO input override.
Definition gpio.c:82
gpio_set_irq_enabled_with_callback
void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t event_mask, bool enabled, gpio_irq_callback_t callback)
Convenience function which performs multiple GPIO IRQ related initializations.
Definition gpio.c:198
gpio_irq_level
gpio_irq_level
GPIO Interrupt level definitions (GPIO events).
Definition gpio.h:190
gpio_xor_mask
static void gpio_xor_mask(uint32_t mask)
Toggle every GPIO appearing in mask.
Definition gpio.h:1013
gpio_set_dir
static void gpio_set_dir(uint gpio, bool out)
Set a single GPIO direction.
Definition gpio.h:1350
gpio_clr_mask
static void gpio_clr_mask(uint32_t mask)
Drive low every GPIO appearing in mask.
Definition gpio.h:965
gpio_put_masked_n
static void gpio_put_masked_n(uint n, uint32_t mask, uint32_t value)
Drive GPIOs high/low depending on parameters.
Definition gpio.h:1108
gpio_set_dir_out_masked64
static void gpio_set_dir_out_masked64(uint64_t mask)
Set a number of GPIOs to output.
Definition gpio.h:1233
gpio_put
static void gpio_put(uint gpio, bool value)
Drive a single GPIO high/low.
Definition gpio.h:1155
gpio_xor_mask_n
static void gpio_xor_mask_n(uint n, uint32_t mask)
Toggle every GPIO appearing in mask.
Definition gpio.h:1043
gpio_slew_rate
gpio_slew_rate
Slew rate limiting levels for GPIO outputs.
Definition gpio.h:226
gpio_set_input_enabled
void gpio_set_input_enabled(uint gpio, bool enabled)
Enable GPIO input.
Definition gpio.c:265
gpio_override
gpio_override
GPIO override modes.
Definition gpio.h:212
gpio_add_raw_irq_handler_with_order_priority_masked64
void gpio_add_raw_irq_handler_with_order_priority_masked64(uint64_t gpio_mask, irq_handler_t handler, uint8_t order_priority)
Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:224
gpio_set_dir_in_masked
static void gpio_set_dir_in_masked(uint32_t mask)
Set a number of GPIOs to input.
Definition gpio.h:1249
gpio_put_all
static void gpio_put_all(uint32_t value)
Drive all pins simultaneously.
Definition gpio.h:1125
gpio_set_dir_out_masked
static void gpio_set_dir_out_masked(uint32_t mask)
Set a number of GPIOs to output.
Definition gpio.h:1218
gpio_set_outover
void gpio_set_outover(uint gpio, uint value)
Set GPIO output override.
Definition gpio.c:90
gpio_set_function_masked64
void gpio_set_function_masked64(uint64_t gpio_mask, gpio_function_t fn)
Select the function for multiple GPIOs.
Definition gpio.c:301
gpio_init
void gpio_init(uint gpio)
Initialise a GPIO for (enabled I/O and set func to GPIO_FUNC_SIO).
Definition gpio.c:273
gpio_irq_callback_t
void(* gpio_irq_callback_t)(uint gpio, uint32_t event_mask)
Definition gpio.h:205
gpio_remove_raw_irq_handler_masked64
void gpio_remove_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler)
Removes a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:244
gpio_set_mask_n
static void gpio_set_mask_n(uint n, uint32_t mask)
Drive high every GPIO appearing in mask.
Definition gpio.h:948
gpio_clr_mask_n
static void gpio_clr_mask_n(uint n, uint32_t mask)
Drive low every GPIO appearing in mask.
Definition gpio.h:996
gpio_set_irqover
void gpio_set_irqover(uint gpio, uint value)
Set GPIO IRQ override.
Definition gpio.c:73
gpio_set_mask64
static void gpio_set_mask64(uint64_t mask)
Drive high every GPIO appearing in mask.
Definition gpio.h:931
gpio_is_dir_out
static bool gpio_is_dir_out(uint gpio)
Check if a specific GPIO direction is OUT.
Definition gpio.h:1383
gpio_get_all64
static uint64_t gpio_get_all64(void)
Get raw value of all GPIOs.
Definition gpio.h:899
gpio_put_masked64
static void gpio_put_masked64(uint64_t mask, uint64_t value)
Drive GPIOs high/low depending on parameters.
Definition gpio.h:1085
gpio_set_dir_masked
static void gpio_set_dir_masked(uint32_t mask, uint32_t value)
Set multiple GPIO directions.
Definition gpio.h:1284
gpio_clr_mask64
static void gpio_clr_mask64(uint64_t mask)
Drive low every GPIO appearing in mask.
Definition gpio.h:978
gpio_set_dir_all_bits64
static void gpio_set_dir_all_bits64(uint64_t values)
Set direction of all pins simultaneously.
Definition gpio.h:1333
gpio_set_pulls
void gpio_set_pulls(uint gpio, bool up, bool down)
Select up and down pulls on specific GPIO.
Definition gpio.c:63
gpio_xor_mask64
static void gpio_xor_mask64(uint64_t mask)
Toggle every GPIO appearing in mask.
Definition gpio.h:1026
gpio_is_input_hysteresis_enabled
bool gpio_is_input_hysteresis_enabled(uint gpio)
Determine whether input hysteresis is enabled on a specified GPIO.
Definition gpio.c:115
gpio_set_dir_in_masked64
static void gpio_set_dir_in_masked64(uint64_t mask)
Set a number of GPIOs to input.
Definition gpio.h:1262
gpio_is_pulled_up
static bool gpio_is_pulled_up(uint gpio)
Determine if the specified GPIO is pulled up.
Definition gpio.h:314
gpio_put_masked
static void gpio_put_masked(uint32_t mask, uint32_t value)
Drive GPIOs high/low depending on parameters.
Definition gpio.h:1066
gpio_acknowledge_irq
static void gpio_acknowledge_irq(uint gpio, uint32_t event_mask)
Acknowledge a GPIO interrupt for the specified events on the calling core.
Definition gpio.h:573
gpio_disable_pulls
static void gpio_disable_pulls(uint gpio)
Disable pulls on specified GPIO.
Definition gpio.h:342
gpio_get_all
static uint32_t gpio_get_all(void)
Get raw value of all GPIOs.
Definition gpio.h:886
gpio_pull_down
static void gpio_pull_down(uint gpio)
Set specified GPIO to be pulled down.
Definition gpio.h:323
gpio_set_slew_rate
void gpio_set_slew_rate(uint gpio, enum gpio_slew_rate slew)
Set slew rate for a specified GPIO.
Definition gpio.c:120
gpio_get_irq_event_mask
static uint32_t gpio_get_irq_event_mask(uint gpio)
Return the current interrupt status (pending events) for the given GPIO.
Definition gpio.h:551
gpio_get
static bool gpio_get(uint gpio)
Get state of a single specified GPIO.
Definition gpio.h:869
gpio_set_mask
static void gpio_set_mask(uint32_t mask)
Drive high every GPIO appearing in mask.
Definition gpio.h:918
gpio_add_raw_irq_handler_with_order_priority_masked
void gpio_add_raw_irq_handler_with_order_priority_masked(uint32_t gpio_mask, irq_handler_t handler, uint8_t order_priority)
Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:218
gpio_add_raw_irq_handler_masked
void gpio_add_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler)
Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.
Definition gpio.c:230
GPIO_DRIVE_STRENGTH_2MA
@ GPIO_DRIVE_STRENGTH_2MA
2 mA nominal drive strength
Definition gpio.h:238
GPIO_DRIVE_STRENGTH_8MA
@ GPIO_DRIVE_STRENGTH_8MA
8 mA nominal drive strength
Definition gpio.h:240
GPIO_DRIVE_STRENGTH_12MA
@ GPIO_DRIVE_STRENGTH_12MA
12 mA nominal drive strength
Definition gpio.h:241
GPIO_DRIVE_STRENGTH_4MA
@ GPIO_DRIVE_STRENGTH_4MA
4 mA nominal drive strength
Definition gpio.h:239
GPIO_IRQ_EDGE_RISE
@ GPIO_IRQ_EDGE_RISE
IRQ when the GPIO has transitioned from a logical 0 to a logical 1.
Definition gpio.h:194
GPIO_IRQ_EDGE_FALL
@ GPIO_IRQ_EDGE_FALL
IRQ when the GPIO has transitioned from a logical 1 to a logical 0.
Definition gpio.h:193
GPIO_IRQ_LEVEL_LOW
@ GPIO_IRQ_LEVEL_LOW
IRQ when the GPIO pin is a logical 0.
Definition gpio.h:191
GPIO_IRQ_LEVEL_HIGH
@ GPIO_IRQ_LEVEL_HIGH
IRQ when the GPIO pin is a logical 1.
Definition gpio.h:192
GPIO_SLEW_RATE_FAST
@ GPIO_SLEW_RATE_FAST
Slew rate limiting disabled.
Definition gpio.h:228
GPIO_SLEW_RATE_SLOW
@ GPIO_SLEW_RATE_SLOW
Slew rate limiting enabled.
Definition gpio.h:227
GPIO_OVERRIDE_INVERT
@ GPIO_OVERRIDE_INVERT
invert peripheral signal selected via gpio_set_function
Definition gpio.h:214
GPIO_OVERRIDE_HIGH
@ GPIO_OVERRIDE_HIGH
drive high/enable output
Definition gpio.h:216
GPIO_OVERRIDE_LOW
@ GPIO_OVERRIDE_LOW
drive low/disable output
Definition gpio.h:215
GPIO_OVERRIDE_NORMAL
@ GPIO_OVERRIDE_NORMAL
peripheral signal selected via gpio_set_function
Definition gpio.h:213
irq_handler_t
void(* irq_handler_t)(void)
Interrupt handler function type.
Definition irq.h:195
get_core_num
static __force_inline uint get_core_num(void)
Get the current core number.
Definition platform.h:114
irq.h
pico.h
io_bank0_irq_ctrl_hw_t
Definition io_bank0.h:67