Package: opensta
Version: 0~20191111gitc018cb2+dfsg-1.1
Architecture: arm64
Maintainer: Ubuntu Developers <ubuntu-devel-discuss@lists.ubuntu.com>
Original-Maintainer: Debian Electronics Team <pkg-electronics-devel@lists.alioth.debian.org>
Installed-Size: 3704
Depends: libc6 (>= 2.38), libgcc-s1 (>= 3.3.1), libreadline8t64 (>= 6.0), libstdc++6 (>= 14), libtcl8.6 (>= 8.6.0), zlib1g (>= 1:1.1.4)
Section: electronics
Priority: optional
Homepage: https://github.com/The-OpenROAD-Project/OpenSTA
Description: Gate-level Static Timing Analyzer
 After synthesis, place and route of a digital circuit, it is necessary to
 verify the timing of the design. OpenSTA is a tool for doing exactly that. It
 has a Tcl interface for entering commands for analysing designs.
 .
 It typically takes as input a verilog netlist, a liberty file, and other
 parasitics information from the placed and routed design.
