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trc_cmp_cfg_etmv4.h
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/*
* \file trc_cmp_cfg_etmv4.h
* \brief OpenCSD :
*
* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
*/
/*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
#define ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
#include "trc_pkt_types_etmv4.h"
#include "common/trc_cs_config.h"
class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
{
public:
EtmV4Config();
EtmV4Config(const ocsd_etmv4_cfg *cfg_regs);
~EtmV4Config() {};
// operations to convert to and from C-API structure
EtmV4Config & operator=(const ocsd_etmv4_cfg *p_cfg);
operator const ocsd_etmv4_cfg &() const { return m_cfg; };
operator const ocsd_etmv4_cfg *() const { return &m_cfg; };
const ocsd_core_profile_t &coreProfile() const { return m_cfg.core_prof; };
const ocsd_arch_version_t &archVersion() const { return m_cfg.arch_ver; };
/* idr 0 */
const bool LSasInstP0() const;
const bool hasDataTrace() const;
const bool hasBranchBroadcast() const;
const bool hasCondTrace() const;
const bool hasCycleCountI() const;
const bool hasRetStack() const;
const uint8_t numEvents() const;
const bool eteHasTSMarker() const;
typedef enum _condType {
COND_PASS_FAIL,
COND_HAS_ASPR
} condType;
const condType hasCondType() const;
typedef enum _QSuppType {
Q_NONE,
Q_ICOUNT_ONLY,
Q_NO_ICOUNT_ONLY,
Q_FULL
} QSuppType;
const QSuppType getQSuppType();
const bool hasQElem();
const bool hasQFilter();
const bool hasTrcExcpData() const;
const uint32_t TimeStampSize() const;
const bool commitOpt1() const;
const bool commTransP0() const;
/* idr 1 */
const uint8_t MajVersion() const;
const uint8_t MinVersion() const;
const uint8_t FullVersion() const;
/* idr 2 */
const uint32_t iaSizeMax() const;
const uint32_t cidSize() const;
const uint32_t vmidSize();
const uint32_t daSize() const;
const uint32_t dvSize() const;
const uint32_t ccSize() const;
const bool vmidOpt() const;
const bool wfiwfeBranch() const;
/* id regs 8-13*/
const uint32_t MaxSpecDepth() const;
const uint32_t P0_Key_Max() const;
const uint32_t P1_Key_Max() const;
const uint32_t P1_Spcl_Key_Max() const;
const uint32_t CondKeyMax() const;
const uint32_t CondSpecKeyMax() const;
const uint32_t CondKeyMaxIncr() const;
/* trace idr */
virtual const uint8_t getTraceID() const;
/* config R */
const bool enabledDVTrace() const;
const bool enabledDATrace() const;
const bool enabledDataTrace() const;
typedef enum {
LSP0_NONE,
LSP0_L,
LSP0_S,
LSP0_LS
} LSP0_t;
const bool enabledLSP0Trace() const;
const LSP0_t LSP0Type() const;
const bool enabledBrBroad() const;
const bool enabledCCI() const;
const bool enabledCID() const;
const bool enabledVMID() const;
const bool enabledVMIDOpt() const;
typedef enum {
COND_TR_DIS,
COND_TR_LD,
COND_TR_ST,
COND_TR_LDST,
COND_TR_ALL
} CondITrace_t;
const CondITrace_t enabledCondITrace();
const bool enabledTS() const;
const bool enabledRetStack() const;
const bool enabledQE() const;
private:
void PrivateInit();
void CalcQSupp();
void CalcVMIDSize();
bool m_QSuppCalc;
bool m_QSuppFilter;
QSuppType m_QSuppType;
bool m_VMIDSzCalc;
uint32_t m_VMIDSize;
bool m_condTraceCalc;
CondITrace_t m_CondTrace;
protected:
ocsd_etmv4_cfg m_cfg;
uint8_t m_MajVer;
uint8_t m_MinVer;
};
/* idr 0 */
inline const bool EtmV4Config::LSasInstP0() const
{
return (bool)((m_cfg.reg_idr0 & 0x6) == 0x6);
}
inline const bool EtmV4Config::hasDataTrace() const
{
return (bool)((m_cfg.reg_idr0 & 0x18) == 0x18);
}
inline const bool EtmV4Config::hasBranchBroadcast() const
{
return (bool)((m_cfg.reg_idr0 & 0x20) == 0x20);
}
inline const bool EtmV4Config::hasCondTrace() const
{
return (bool)((m_cfg.reg_idr0 & 0x40) == 0x40);
}
inline const bool EtmV4Config::hasCycleCountI() const
{
return (bool)((m_cfg.reg_idr0 & 0x80) == 0x80);
}
inline const bool EtmV4Config::hasRetStack() const
{
return (bool)((m_cfg.reg_idr0 & 0x200) == 0x200);
}
inline const uint8_t EtmV4Config::numEvents() const
{
return ((m_cfg.reg_idr0 >> 10) & 0x3) + 1;
}
inline const EtmV4Config::condType EtmV4Config::hasCondType() const
{
return ((m_cfg.reg_idr0 & 0x3000) == 0x1000) ? EtmV4Config::COND_HAS_ASPR : EtmV4Config::COND_PASS_FAIL;
}
inline const EtmV4Config::QSuppType EtmV4Config::getQSuppType()
{
if(!m_QSuppCalc) CalcQSupp();
return m_QSuppType;
}
inline const bool EtmV4Config::hasQElem()
{
if(!m_QSuppCalc) CalcQSupp();
return (bool)(m_QSuppType != Q_NONE);
}
inline const bool EtmV4Config::hasQFilter()
{
if(!m_QSuppCalc) CalcQSupp();
return m_QSuppFilter;
}
inline const bool EtmV4Config::hasTrcExcpData() const
{
return (bool)((m_cfg.reg_idr0 & 0x20000) == 0x20000);
}
inline const bool EtmV4Config::eteHasTSMarker() const
{
return (FullVersion() >= 0x51) && ((m_cfg.reg_idr0 & 0x800000) == 0x800000);
}
inline const uint32_t EtmV4Config::TimeStampSize() const
{
uint32_t tsSizeF = (m_cfg.reg_idr0 >> 24) & 0x1F;
if(tsSizeF == 0x6)
return 48;
if(tsSizeF == 0x8)
return 64;
return 0;
}
inline const bool EtmV4Config::commitOpt1() const
{
return (bool)((m_cfg.reg_idr0 & 0x20000000) == 0x20000000) && hasCycleCountI();
}
inline const bool EtmV4Config::commTransP0() const
{
return (bool)((m_cfg.reg_idr0 & 0x40000000) == 0x0);
}
/* idr 1 */
inline const uint8_t EtmV4Config::MajVersion() const
{
return m_MajVer;
}
inline const uint8_t EtmV4Config::MinVersion() const
{
return m_MinVer;
}
inline const uint8_t EtmV4Config::FullVersion() const
{
return (m_MajVer << 4) | m_MinVer;
}
/* idr 2 */
inline const uint32_t EtmV4Config::iaSizeMax() const
{
return ((m_cfg.reg_idr2 & 0x1F) == 0x8) ? 64 : 32;
}
inline const uint32_t EtmV4Config::cidSize() const
{
return (((m_cfg.reg_idr2 >> 5) & 0x1F) == 0x4) ? 32 : 0;
}
inline const uint32_t EtmV4Config::vmidSize()
{
if(!m_VMIDSzCalc)
{
CalcVMIDSize();
}
return m_VMIDSize;
}
inline const uint32_t EtmV4Config::daSize() const
{
uint32_t daSizeF = ((m_cfg.reg_idr2 >> 15) & 0x1F);
if(daSizeF)
return (((m_cfg.reg_idr2 >> 15) & 0x1F) == 0x8) ? 64 : 32;
return 0;
}
inline const uint32_t EtmV4Config::dvSize() const
{
uint32_t dvSizeF = ((m_cfg.reg_idr2 >> 20) & 0x1F);
if(dvSizeF)
return (((m_cfg.reg_idr2 >> 20) & 0x1F) == 0x8) ? 64 : 32;
return 0;
}
inline const uint32_t EtmV4Config::ccSize() const
{
return ((m_cfg.reg_idr2 >> 25) & 0xF) + 12;
}
inline const bool EtmV4Config::vmidOpt() const
{
return (bool)((m_cfg.reg_idr2 & 0x20000000) == 0x20000000) && (MinVersion() > 0);
}
inline const bool EtmV4Config::wfiwfeBranch() const
{
return (bool)((m_cfg.reg_idr2 & 0x80000000) && (FullVersion() >= 0x43));
}
/* id regs 8-13*/
inline const uint32_t EtmV4Config::MaxSpecDepth() const
{
return m_cfg.reg_idr8;
}
inline const uint32_t EtmV4Config::P0_Key_Max() const
{
return (m_cfg.reg_idr9 == 0) ? 1 : m_cfg.reg_idr9;
}
inline const uint32_t EtmV4Config::P1_Key_Max() const
{
return m_cfg.reg_idr10;
}
inline const uint32_t EtmV4Config::P1_Spcl_Key_Max() const
{
return m_cfg.reg_idr11;
}
inline const uint32_t EtmV4Config::CondKeyMax() const
{
return m_cfg.reg_idr12;
}
inline const uint32_t EtmV4Config::CondSpecKeyMax() const
{
return m_cfg.reg_idr13;
}
inline const uint32_t EtmV4Config::CondKeyMaxIncr() const
{
return m_cfg.reg_idr12 - m_cfg.reg_idr13;
}
inline const uint8_t EtmV4Config::getTraceID() const
{
return (uint8_t)(m_cfg.reg_traceidr & 0x7F);
}
/* config R */
inline const bool EtmV4Config::enabledDVTrace() const
{
return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 17)) != 0);
}
inline const bool EtmV4Config::enabledDATrace() const
{
return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 16)) != 0);
}
inline const bool EtmV4Config::enabledDataTrace() const
{
return enabledDATrace() || enabledDVTrace();
}
inline const bool EtmV4Config::enabledLSP0Trace() const
{
return ((m_cfg.reg_configr & 0x6) != 0);
}
inline const EtmV4Config::LSP0_t EtmV4Config::LSP0Type() const
{
return (LSP0_t)((m_cfg.reg_configr & 0x6) >> 1);
}
inline const bool EtmV4Config::enabledBrBroad() const
{
return ((m_cfg.reg_configr & (0x1 << 3)) != 0);
}
inline const bool EtmV4Config::enabledCCI() const
{
return ((m_cfg.reg_configr & (0x1 << 4)) != 0);
}
inline const bool EtmV4Config::enabledCID() const
{
return ((m_cfg.reg_configr & (0x1 << 6)) != 0);
}
inline const bool EtmV4Config::enabledVMID() const
{
return ((m_cfg.reg_configr & (0x1 << 7)) != 0);
}
inline const bool EtmV4Config::enabledVMIDOpt() const
{
bool vmidOptVal = ((m_cfg.reg_configr & (0x1 << 15)) != 0);
/* TRIDR2.VMIDOPT[30:29] determine value used */
if (!vmidOpt()) { /* [29] = 1'b0 */
vmidOptVal = false; /* res0 */
if (FullVersion() >= 0x45) {
/* umless version > 4.5 in which case [30] determines res val */
vmidOptVal = ((m_cfg.reg_idr2 & (0x1 << 30)) != 0);
}
}
return vmidOptVal;
}
inline const EtmV4Config::CondITrace_t EtmV4Config::enabledCondITrace()
{
if(!m_condTraceCalc)
{
switch((m_cfg.reg_configr >> 8) & 0x7)
{
default:
case 0: m_CondTrace = COND_TR_DIS; break;
case 1: m_CondTrace = COND_TR_LD; break;
case 2: m_CondTrace = COND_TR_ST; break;
case 3: m_CondTrace = COND_TR_LDST; break;
case 7: m_CondTrace = COND_TR_ALL; break;
}
m_condTraceCalc = true;
}
return m_CondTrace;
}
inline const bool EtmV4Config::enabledTS() const
{
return ((m_cfg.reg_configr & (0x1 << 11)) != 0);
}
inline const bool EtmV4Config::enabledRetStack() const
{
return ((m_cfg.reg_configr & (0x1 << 12)) != 0);
}
inline const bool EtmV4Config::enabledQE() const
{
return ((m_cfg.reg_configr & (0x3 << 13)) != 0);
}
#endif // ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
/* End of File trc_cmp_cfg_etmv4.h */
CSConfig::CSConfig
CSConfig()
Definition trc_cs_config.h:52
EtmV4Config::EtmV4Config
EtmV4Config(const ocsd_etmv4_cfg *cfg_regs)
EtmV4Config::condType
enum EtmV4Config::_condType condType
EtmV4Config::coreProfile
const ocsd_core_profile_t & coreProfile() const
Definition trc_cmp_cfg_etmv4.h:73
EtmV4Config::~EtmV4Config
~EtmV4Config()
Definition trc_cmp_cfg_etmv4.h:61
EtmV4Config::m_MinVer
uint8_t m_MinVer
Definition trc_cmp_cfg_etmv4.h:191
EtmV4Config::LSP0_t
LSP0_t
Definition trc_cmp_cfg_etmv4.h:142
EtmV4Config::LSP0_NONE
@ LSP0_NONE
Definition trc_cmp_cfg_etmv4.h:143
EtmV4Config::LSP0_LS
@ LSP0_LS
Definition trc_cmp_cfg_etmv4.h:146
EtmV4Config::LSP0_S
@ LSP0_S
Definition trc_cmp_cfg_etmv4.h:145
EtmV4Config::LSP0_L
@ LSP0_L
Definition trc_cmp_cfg_etmv4.h:144
EtmV4Config::m_MajVer
uint8_t m_MajVer
Definition trc_cmp_cfg_etmv4.h:190
EtmV4Config::operator=
EtmV4Config & operator=(const ocsd_etmv4_cfg *p_cfg)
copy assignment operator for base structure into class.
EtmV4Config::archVersion
const ocsd_arch_version_t & archVersion() const
Definition trc_cmp_cfg_etmv4.h:74
EtmV4Config::EtmV4Config
EtmV4Config()
EtmV4Config::QSuppType
enum EtmV4Config::_QSuppType QSuppType
EtmV4Config::_condType
_condType
Definition trc_cmp_cfg_etmv4.h:86
EtmV4Config::COND_PASS_FAIL
@ COND_PASS_FAIL
Definition trc_cmp_cfg_etmv4.h:87
EtmV4Config::COND_HAS_ASPR
@ COND_HAS_ASPR
Definition trc_cmp_cfg_etmv4.h:88
EtmV4Config::CondITrace_t
CondITrace_t
Definition trc_cmp_cfg_etmv4.h:158
EtmV4Config::COND_TR_ST
@ COND_TR_ST
Definition trc_cmp_cfg_etmv4.h:161
EtmV4Config::COND_TR_DIS
@ COND_TR_DIS
Definition trc_cmp_cfg_etmv4.h:159
EtmV4Config::COND_TR_ALL
@ COND_TR_ALL
Definition trc_cmp_cfg_etmv4.h:163
EtmV4Config::COND_TR_LDST
@ COND_TR_LDST
Definition trc_cmp_cfg_etmv4.h:162
EtmV4Config::COND_TR_LD
@ COND_TR_LD
Definition trc_cmp_cfg_etmv4.h:160
EtmV4Config::m_cfg
ocsd_etmv4_cfg m_cfg
Definition trc_cmp_cfg_etmv4.h:189
EtmV4Config::_QSuppType
_QSuppType
Definition trc_cmp_cfg_etmv4.h:93
EtmV4Config::Q_NO_ICOUNT_ONLY
@ Q_NO_ICOUNT_ONLY
Definition trc_cmp_cfg_etmv4.h:96
EtmV4Config::Q_ICOUNT_ONLY
@ Q_ICOUNT_ONLY
Definition trc_cmp_cfg_etmv4.h:95
EtmV4Config::Q_FULL
@ Q_FULL
Definition trc_cmp_cfg_etmv4.h:97
EtmV4Config::Q_NONE
@ Q_NONE
Definition trc_cmp_cfg_etmv4.h:94
ocsd_core_profile_t
enum _ocsd_core_profile ocsd_core_profile_t
ocsd_arch_version_t
enum _ocsd_arch_version ocsd_arch_version_t
EtmV4Config::enabledLSP0Trace
const bool enabledLSP0Trace() const
Definition trc_cmp_cfg_etmv4.h:410
EtmV4Config::getQSuppType
const QSuppType getQSuppType()
Definition trc_cmp_cfg_etmv4.h:236
EtmV4Config::enabledRetStack
const bool enabledRetStack() const
Definition trc_cmp_cfg_etmv4.h:477
EtmV4Config::MaxSpecDepth
const uint32_t MaxSpecDepth() const
Definition trc_cmp_cfg_etmv4.h:354
EtmV4Config::hasDataTrace
const bool hasDataTrace() const
Definition trc_cmp_cfg_etmv4.h:201
EtmV4Config::LSP0Type
const LSP0_t LSP0Type() const
Definition trc_cmp_cfg_etmv4.h:415
EtmV4Config::vmidOpt
const bool vmidOpt() const
Definition trc_cmp_cfg_etmv4.h:341
EtmV4Config::numEvents
const uint8_t numEvents() const
Definition trc_cmp_cfg_etmv4.h:226
EtmV4Config::getTraceID
virtual const uint8_t getTraceID() const
CoreSight Trace ID for this device.
Definition trc_cmp_cfg_etmv4.h:389
EtmV4Config::enabledDATrace
const bool enabledDATrace() const
Definition trc_cmp_cfg_etmv4.h:400
EtmV4Config::hasCondTrace
const bool hasCondTrace() const
Definition trc_cmp_cfg_etmv4.h:211
EtmV4Config::hasCondType
const condType hasCondType() const
Definition trc_cmp_cfg_etmv4.h:231
EtmV4Config::hasRetStack
const bool hasRetStack() const
Definition trc_cmp_cfg_etmv4.h:221
EtmV4Config::daSize
const uint32_t daSize() const
Definition trc_cmp_cfg_etmv4.h:320
EtmV4Config::wfiwfeBranch
const bool wfiwfeBranch() const
Definition trc_cmp_cfg_etmv4.h:346
EtmV4Config::iaSizeMax
const uint32_t iaSizeMax() const
Definition trc_cmp_cfg_etmv4.h:301
EtmV4Config::enabledCCI
const bool enabledCCI() const
Definition trc_cmp_cfg_etmv4.h:425
EtmV4Config::MajVersion
const uint8_t MajVersion() const
Definition trc_cmp_cfg_etmv4.h:285
EtmV4Config::cidSize
const uint32_t cidSize() const
Definition trc_cmp_cfg_etmv4.h:306
EtmV4Config::commTransP0
const bool commTransP0() const
Definition trc_cmp_cfg_etmv4.h:279
EtmV4Config::hasCycleCountI
const bool hasCycleCountI() const
Definition trc_cmp_cfg_etmv4.h:216
EtmV4Config::ccSize
const uint32_t ccSize() const
Definition trc_cmp_cfg_etmv4.h:336
EtmV4Config::LSasInstP0
const bool LSasInstP0() const
Definition trc_cmp_cfg_etmv4.h:196
EtmV4Config::enabledDataTrace
const bool enabledDataTrace() const
Definition trc_cmp_cfg_etmv4.h:405
EtmV4Config::enabledVMID
const bool enabledVMID() const
Definition trc_cmp_cfg_etmv4.h:435
EtmV4Config::vmidSize
const uint32_t vmidSize()
Definition trc_cmp_cfg_etmv4.h:311
EtmV4Config::enabledCondITrace
const CondITrace_t enabledCondITrace()
Definition trc_cmp_cfg_etmv4.h:454
EtmV4Config::enabledVMIDOpt
const bool enabledVMIDOpt() const
Definition trc_cmp_cfg_etmv4.h:440
EtmV4Config::CondSpecKeyMax
const uint32_t CondSpecKeyMax() const
Definition trc_cmp_cfg_etmv4.h:379
EtmV4Config::FullVersion
const uint8_t FullVersion() const
Definition trc_cmp_cfg_etmv4.h:295
EtmV4Config::P1_Key_Max
const uint32_t P1_Key_Max() const
Definition trc_cmp_cfg_etmv4.h:364
EtmV4Config::hasBranchBroadcast
const bool hasBranchBroadcast() const
Definition trc_cmp_cfg_etmv4.h:206
EtmV4Config::hasQElem
const bool hasQElem()
Definition trc_cmp_cfg_etmv4.h:242
EtmV4Config::eteHasTSMarker
const bool eteHasTSMarker() const
Definition trc_cmp_cfg_etmv4.h:259
EtmV4Config::dvSize
const uint32_t dvSize() const
Definition trc_cmp_cfg_etmv4.h:328
EtmV4Config::P1_Spcl_Key_Max
const uint32_t P1_Spcl_Key_Max() const
Definition trc_cmp_cfg_etmv4.h:369
EtmV4Config::CondKeyMaxIncr
const uint32_t CondKeyMaxIncr() const
Definition trc_cmp_cfg_etmv4.h:384
EtmV4Config::hasTrcExcpData
const bool hasTrcExcpData() const
Definition trc_cmp_cfg_etmv4.h:254
EtmV4Config::P0_Key_Max
const uint32_t P0_Key_Max() const
Definition trc_cmp_cfg_etmv4.h:359
EtmV4Config::TimeStampSize
const uint32_t TimeStampSize() const
Definition trc_cmp_cfg_etmv4.h:264
EtmV4Config::CondKeyMax
const uint32_t CondKeyMax() const
Definition trc_cmp_cfg_etmv4.h:374
EtmV4Config::enabledDVTrace
const bool enabledDVTrace() const
Definition trc_cmp_cfg_etmv4.h:395
EtmV4Config::hasQFilter
const bool hasQFilter()
Definition trc_cmp_cfg_etmv4.h:248
EtmV4Config::enabledBrBroad
const bool enabledBrBroad() const
Definition trc_cmp_cfg_etmv4.h:420
EtmV4Config::enabledTS
const bool enabledTS() const
Definition trc_cmp_cfg_etmv4.h:472
EtmV4Config::commitOpt1
const bool commitOpt1() const
Definition trc_cmp_cfg_etmv4.h:274
EtmV4Config::enabledQE
const bool enabledQE() const
Definition trc_cmp_cfg_etmv4.h:482
EtmV4Config::enabledCID
const bool enabledCID() const
Definition trc_cmp_cfg_etmv4.h:430
EtmV4Config::MinVersion
const uint8_t MinVersion() const
Definition trc_cmp_cfg_etmv4.h:290
ocsd_etmv4_cfg
struct _ocsd_etmv4_cfg ocsd_etmv4_cfg
trc_cs_config.h
trc_pkt_types_etmv4.h