`sig
module Endian : sig type t = Big | Little end
module CodeGenOptLevel :
sig type t = None | Less | Default | Aggressive end
module RelocMode : sig type t = Default | Static | PIC | DynamicNoPIC end
module CodeModel :
sig type t = Default | JITDefault | Small | Kernel | Medium | Large end
module CodeGenFileType : sig type t = AssemblyFile | ObjectFile end
exception Error of string
module DataLayout :
sig
type t
val of_string : string -> Llvm_target.DataLayout.t
val as_string : Llvm_target.DataLayout.t -> string
val byte_order : Llvm_target.DataLayout.t -> Llvm_target.Endian.t
val pointer_size : Llvm_target.DataLayout.t -> int
val intptr_type :
Llvm.llcontext -> Llvm_target.DataLayout.t -> Llvm.lltype
val qualified_pointer_size : int -> Llvm_target.DataLayout.t -> int
val qualified_intptr_type :
Llvm.llcontext -> int -> Llvm_target.DataLayout.t -> Llvm.lltype
val size_in_bits :
Llvm.lltype -> Llvm_target.DataLayout.t -> Stdlib.Int64.t
val store_size :
Llvm.lltype -> Llvm_target.DataLayout.t -> Stdlib.Int64.t
val abi_size :
Llvm.lltype -> Llvm_target.DataLayout.t -> Stdlib.Int64.t
val abi_align : Llvm.lltype -> Llvm_target.DataLayout.t -> int
val stack_align : Llvm.lltype -> Llvm_target.DataLayout.t -> int
val preferred_align : Llvm.lltype -> Llvm_target.DataLayout.t -> int
val preferred_align_of_global :
Llvm.llvalue -> Llvm_target.DataLayout.t -> int
val element_at_offset :
Llvm.lltype -> Stdlib.Int64.t -> Llvm_target.DataLayout.t -> int
val offset_of_element :
Llvm.lltype -> int -> Llvm_target.DataLayout.t -> Stdlib.Int64.t
end
module Target :
sig
type t
val default_triple : unit -> string
val first : unit -> Llvm_target.Target.t option
val succ : Llvm_target.Target.t -> Llvm_target.Target.t option
val all : unit -> Llvm_target.Target.t list
val by_name : string -> Llvm_target.Target.t option
val by_triple : string -> Llvm_target.Target.t
val name : Llvm_target.Target.t -> string
val description : Llvm_target.Target.t -> string
val has_jit : Llvm_target.Target.t -> bool
val has_target_machine : Llvm_target.Target.t -> bool
val has_asm_backend : Llvm_target.Target.t -> bool
end
module TargetMachine :
sig
type t
val create :
triple:string ->
?cpu:string ->
?features:string ->
?level:Llvm_target.CodeGenOptLevel.t ->
?reloc_mode:Llvm_target.RelocMode.t ->
?code_model:Llvm_target.CodeModel.t ->
Llvm_target.Target.t -> Llvm_target.TargetMachine.t
val target : Llvm_target.TargetMachine.t -> Llvm_target.Target.t
val triple : Llvm_target.TargetMachine.t -> string
val cpu : Llvm_target.TargetMachine.t -> string
val data_layout :
Llvm_target.TargetMachine.t -> Llvm_target.DataLayout.t
val features : Llvm_target.TargetMachine.t -> string
val set_verbose_asm : bool -> Llvm_target.TargetMachine.t -> unit
val emit_to_file :
Llvm.llmodule ->
Llvm_target.CodeGenFileType.t ->
string -> Llvm_target.TargetMachine.t -> unit
val emit_to_memory_buffer :
Llvm.llmodule ->
Llvm_target.CodeGenFileType.t ->
Llvm_target.TargetMachine.t -> Llvm.llmemorybuffer
end
end`