clash-prelude-1.8.4: Clash: a functional hardware description language - Prelude library

Copyright | (C) 2015-2016 University of Twente 2017-2019 Myrtle Software Ltd 2017 Google Inc. 2021-2022 QBayLogic B.V.
License | BSD2 (see the file LICENSE)
Maintainer | QBayLogic B.V. <devops@qbaylogic.com>
Safe Haskell | Safe
Language | Haskell2010

Extensions

- Cpp
- MonoLocalBinds
- ScopedTypeVariables
- BangPatterns
- TypeFamilies
- ViewPatterns
- DataKinds
- InstanceSigs
- StandaloneDeriving
- DeriveDataTypeable
- DeriveFunctor
- DeriveTraversable
- DeriveFoldable
- DeriveGeneric
- DefaultSignatures
- DeriveLift
- DerivingStrategies
- FlexibleContexts
- MagicHash
- KindSignatures
- PostfixOperators
- TupleSections
- TypeOperators
- ExplicitNamespaces
- ExplicitForAll
- BinaryLiterals
- TypeApplications

Clash.Prelude.RAM

Contents

- RAM synchronized to an arbitrary clock

Description

RAM primitives with a combinational read port

Synopsis

- asyncRam :: forall addr (dom :: Domain) a (n :: Nat). (Enum addr, NFDataX addr, HiddenClock dom, HiddenEnable dom, HasCallStack, NFDataX a) => SNat n -> Signal dom addr -> Signal dom (Maybe (addr, a)) -> Signal dom a
- asyncRamPow2 :: forall (n :: Nat) (dom :: Domain) a. (KnownNat n, HiddenClock dom, HiddenEnable dom, HasCallStack, NFDataX a) => Signal dom (Unsigned n) -> Signal dom (Maybe (Unsigned n, a)) -> Signal dom a

# RAM synchronized to an arbitrary clock

asyncRam Source #

Arguments

:: forall addr (dom :: Domain) a (n :: Nat). (Enum addr, NFDataX addr, HiddenClock dom, HiddenEnable dom, HasCallStack, NFDataX a) |
=> SNat n | Size `n` of the RAM
-> Signal dom addr | Read address `r`
-> Signal dom (Maybe (addr, a)) | (write address `w`, value to write)
-> Signal dom a | Value of the RAM at address `r`

Create a RAM with space for `n` elements

- NB: Initial content of the RAM is undefined, reading it will throw an `XException`

### See also:

- See Clash.Prelude.BlockRam for more information on how to use a RAM.

asyncRamPow2 Source #

Arguments

:: forall (n :: Nat) (dom :: Domain) a. (KnownNat n, HiddenClock dom, HiddenEnable dom, HasCallStack, NFDataX a) |
=> Signal dom (Unsigned n) | Read address `r`
-> Signal dom (Maybe (Unsigned n, a)) | (write address `w`, value to write)
-> Signal dom a | Value of the RAM at address `r`

Create a RAM with space for 2^`n` elements

- NB: Initial content of the RAM is undefined, reading it will throw an `XException`

### See also:

- See Clash.Prelude.BlockRam for more information on how to use a RAM.