Features Configuration Bits RAM map SFR map

PIC18F24J50
Bank 14 | Bank 15
--- | ---

RPOR0 | 0xEC6
RPOR1 | 0xEC7
RPOR2 | 0xEC8
RPOR3 | 0xEC9
RPOR4 | 0xECA
RPOR5 | 0xECB
RPOR6 | 0xECC
RPOR7 | 0xECD
RPOR8 | 0xECE
RPOR9 | 0xECF
RPOR10 | 0xED0
RPOR11 | 0xED1
RPOR12 | 0xED2
RPOR13 | 0xED3
RPOR17 | 0xED7
RPOR18 | 0xED8
RPINR1 | 0xEE7
RPINR2 | 0xEE8
RPINR3 | 0xEE9
RPINR4 | 0xEEA
RPINR6 | 0xEEC
RPINR7 | 0xEED
RPINR8 | 0xEEE
RPINR12 | 0xEF2
RPINR13 | 0xEF3
RPINR16 | 0xEF6
RPINR17 | 0xEF7
RPINR21 | 0xEFB
RPINR22 | 0xEFC
RPINR23 | 0xEFD
RPINR24 | 0xEFE
PPSCON | 0xEFF

UEP0 | 0xF26
UEP1 | 0xF27
UEP2 | 0xF28
UEP3 | 0xF29
UEP4 | 0xF2A
UEP5 | 0xF2B
UEP6 | 0xF2C
UEP7 | 0xF2D
UEP8 | 0xF2E
UEP9 | 0xF2F
UEP10 | 0xF30
UEP11 | 0xF31
UEP12 | 0xF32
UEP13 | 0xF33
UEP14 | 0xF34
UEP15 | 0xF35
UIE | 0xF36
UEIE | 0xF37
UADDR | 0xF38
UCFG | 0xF39
PADCFG1 | 0xF3C
REFOCON | 0xF3D
RTCCAL | 0xF3E
RTCCFG | 0xF3F
ODCON3 | 0xF40
ODCON2 | 0xF41
ODCON1 | 0xF42
ANCON0 | 0xF48
ANCON1 | 0xF49
DSWAKEL | 0xF4A
DSWAKEH | 0xF4B
DSCONL | 0xF4C
DSCONH | 0xF4D
DSGPR0 | 0xF4E
DSGPR1 | 0xF4F
TCLKCON | 0xF52
CVRCON | 0xF53
UFRMUFRML | 0xF60
UFRMH | 0xF61
UIR | 0xF62
UEIR | 0xF63
USTAT | 0xF64
UCON | 0xF65
DMABCH | 0xF66
DMABCL | 0xF67
RXADDRH | 0xF68
RXADDRL | 0xF69
TXADDRH | 0xF6A
TXADDRL | 0xF6B
CMSTATCMSTATUS | 0xF70
SSP2CON2 | 0xF71
SSP2CON1 | 0xF72
SSP2STAT | 0xF73
SSP2ADDSSP2MSK | 0xF74
SSP2BUF | 0xF75
T4CON | 0xF76
PR4 | 0xF77
TMR4 | 0xF78
T3CON | 0xF79
TMR3TMR3L | 0xF7A
TMR3H | 0xF7B
BAUDCON2 | 0xF7C
SPBRGH2 | 0xF7D
BAUDCONBAUDCON1 BAUDCTL | 0xF7E
SPBRGHSPBRGH1 | 0xF7F
PORTA | 0xF80
PORTB | 0xF81
PORTC | 0xF82
HLVDCON | 0xF85
DMACON2 | 0xF86
DMACON1 | 0xF88
LATA | 0xF89
LATB | 0xF8A
LATC | 0xF8B
ALRMVALL | 0xF8E
ALRMVALH | 0xF8F
ALRMRPT | 0xF90
ALRMCFG | 0xF91
TRISA | 0xF92
TRISB | 0xF93
TRISC | 0xF94
T3GCON | 0xF97
RTCVALL | 0xF98
RTCVALH | 0xF99
T1GCON | 0xF9A
OSCTUNE | 0xF9B
RCSTA2 | 0xF9C
PIE1 | 0xF9D
PIR1 | 0xF9E
IPR1 | 0xF9F
PIE2 | 0xFA0
PIR2 | 0xFA1
IPR2 | 0xFA2
PIE3 | 0xFA3
PIR3 | 0xFA4
IPR3 | 0xFA5
EECON1 | 0xFA6
EECON2 | 0xFA7
TXSTA2 | 0xFA8
TXREG2 | 0xFA9
RCREG2 | 0xFAA
SPBRG2 | 0xFAB
RCSTARCSTA1 | 0xFAC
TXSTATXSTA1 | 0xFAD
TXREGTXREG1 | 0xFAE
RCREGRCREG1 | 0xFAF
SPBRGSPBRG1 | 0xFB0
CTMUICON | 0xFB1
CTMUCONL | 0xFB2
CTMUCONH | 0xFB3
CCP2CONECCP2CON | 0xFB4
CCPR2CCPR2L | 0xFB5
CCPR2H | 0xFB6
ECCP2DELPWM2CON | 0xFB7
ECCP2AS | 0xFB8
PSTR2CON | 0xFB9
CCP1CONECCP1CON | 0xFBA
CCPR1CCPR1L | 0xFBB
CCPR1H | 0xFBC
ECCP1DELPWM1CON | 0xFBD
ECCP1AS | 0xFBE
PSTR1CON | 0xFBF
WDTCON | 0xFC0
ADCON1 | 0xFC1
ADCON0 | 0xFC2
ADRESADRESL | 0xFC3
ADRESH | 0xFC4
SSP1CON2SSPCON2 | 0xFC5
SSP1CON1SSPCON1 | 0xFC6
SSP1STATSSPSTAT | 0xFC7
SSP1ADDSSP1MSK SSPADD | 0xFC8
SSP1BUFSSPBUF | 0xFC9
T2CON | 0xFCA
PR2 | 0xFCB
TMR2 | 0xFCC
T1CON | 0xFCD
TMR1TMR1L | 0xFCE
TMR1H | 0xFCF
RCON | 0xFD0
CM2CONCM2CON1 | 0xFD1
CM1CONCM1CON1 | 0xFD2
OSCCON | 0xFD3
T0CON | 0xFD5
TMR0TMR0L | 0xFD6
TMR0H | 0xFD7
STATUS | 0xFD8
FSR2L | 0xFD9
FSR2H | 0xFDA
PLUSW2 | 0xFDB
PREINC2 | 0xFDC
POSTDEC2 | 0xFDD
POSTINC2 | 0xFDE
INDF2 | 0xFDF
BSR | 0xFE0
FSR1L | 0xFE1
FSR1H | 0xFE2
PLUSW1 | 0xFE3
PREINC1 | 0xFE4
POSTDEC1 | 0xFE5
POSTINC1 | 0xFE6
INDF1 | 0xFE7
WREG | 0xFE8
FSR0L | 0xFE9
FSR0H | 0xFEA
PLUSW0 | 0xFEB
PREINC0 | 0xFEC
POSTDEC0 | 0xFED
POSTINC0 | 0xFEE
INDF0 | 0xFEF
INTCON3 | 0xFF0
INTCON2 | 0xFF1
INTCON | 0xFF2
PRODPRODL | 0xFF3
PRODH | 0xFF4
TABLAT | 0xFF5
TBLPTRTBLPTRL | 0xFF6
TBLPTRH | 0xFF7
TBLPTRU | 0xFF8
PCPCL | 0xFF9
PCLATH | 0xFFA
PCLATU | 0xFFB
STKPTR | 0xFFC
TOSTOSL | 0xFFD
TOSH | 0xFFE
TOSU | 0xFFF

SFR

SFR with alias name.

SFR on Access Area.

This page generated automatically by the device-help.pl program (2022-01-30 15:56:10 UTC) from the 8bit_device.info file (rev: 1.44) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.