#### 2.1.2.5 Address transfer operators ¶

In these instructions, ‘`M`’ (the address of the instruction after indexing) is used as a number instead of as the address of a memory cell. Consequently, ‘`M`’ can have any valid word value (i.e., it’s not limited to the 0-3999 range of a memory address).

`ENTA` ¶

  Enter ‘`M`’ in [rA]. OPCODE = 48, MOD = 2. `rA <- M`.

`ENTX` ¶

  Enter ‘`M`’ in [rX]. OPCODE = 55, MOD = 2. `rX <- M`.

`ENTi` ¶

  Enter ‘`M`’ in [rIi]. OPCODE = 48 + i, MOD = 2. `rIi <- M`.

`ENNA` ¶

  Enter ‘`-M`’ in [rA]. OPCODE = 48, MOD = 3. `rA <- -M`.

`ENNX` ¶

  Enter ‘`-M`’ in [rX]. OPCODE = 55, MOD = 3. `rX <- -M`.

`ENNi` ¶

  Enter ‘`-M`’ in [rIi]. OPCODE = 48 + i, MOD = 3. `rIi <- -M`.

`INCA` ¶

  Increase [rA] by ‘`M`’. OPCODE = 48, MOD = 0. `rA <- rA + M`.

`INCX` ¶

  Increase [rX] by ‘`M`’. OPCODE = 55, MOD = 0. `rX <- rX + M`.

`INCi` ¶

  Increase [rIi] by ‘`M`’. OPCODE = 48 + i, MOD = 0. `rIi <- rIi + M`.

`DECA` ¶

  Decrease [rA] by ‘`M`’. OPCODE = 48, MOD = 1. `rA <- rA - M`.

`DECX` ¶

  Decrease [rX] by ‘`M`’. OPCODE = 55, MOD = 1. `rX <- rX - M`.

`DECi` ¶

  Decrease [rIi] by ‘`M`’. OPCODE = 48 + i, MaOD = 0. `rIi <- rIi - M`.

In the above instructions, the subfield ‘`ADDRESS`’ acts as an immediate (indexed) operand, and allow us to set directly the contents of the MIX registers without an indirection to the memory cells (in a real CPU this would mean that they are faster that the previously discussed instructions, whose operands are fetched from memory). So, if you want to store in ‘`rA`’ the value -2000 (- 00 00 00 31 16), you can use the binary instruction + 31 16 00 03 48, or, symbolically,

    ENNA 2000

Used in conjunction with the store operations (‘`STA`’, ‘`STX`’, etc.), these instructions also allow you to set memory cells contents to concrete values.

Note that in these address transfer operators, the ‘`MOD`’ field is not a subfield specificator, but serves to define (together with ‘`OPCODE`’) the concrete operation to be performed.