#### 2.1.2.2 Loading operators ¶

The following instructions are used to load memory contents into a register.

`LDA` ¶

  Put in rA the contents of cell no. M. OPCODE = 8, MOD = fspec. `rA <- V`.

`LDX` ¶

  Put in rX the contents of cell no. M. OPCODE = 15, MOD = fspec. `rX <- V`.

`LDi` ¶

  Put in rIi the contents of cell no. M. OPCODE = 8 + i, MOD = fspec. `rIi <- V`.

`LDAN` ¶

  Put in rA the contents of cell no. M, with opposite sign. OPCODE = 16, MOD = fspec. `rA <- -V`.

`LDXN` ¶

  Put in rX the contents of cell no. M, with opposite sign. OPCODE = 23, MOD = fspec. `rX <- -V`.

`LDiN` ¶

  Put in rIi the contents of cell no. M, with opposite sign. OPCODE = 16 + i, MOD = fspec. `rIi <- -V`.

In all the above load instructions the ‘`MOD`’ field selects the bytes of the memory cell with address ‘`M`’ which are loaded into the requisite register (indicated by the ‘`OPCODE`’). For instance, the word ‘`+ 00 13 01 27 11`’ represents the instruction

    LD3    13,1(3:3)
     ^      ^ ^  ^
     |      | |  |
     |      | |   --- MOD = 27 = 3*8 + 3
     |      |  --- INDEX = 1
     |       --- ADDRESS = 00 13
      --- OPCODE = 11

Let us suppose that, prior to this instruction execution, the state of the MIX computer is the following:

    [rI1] = - 00 01
    [rI3] = + 24 12
    [12] = - 01 02 03 04 05

As, in this case, ‘`M = 13 + [rI1] = 12`’, we have

    V = [M](3:3) = (- 01 02 03 04 05)(3:3)
      = + 00 00 00 00 03

(note that the specified subfield is left-padded with null bytes to complete a word). Hence, the MIX state, after the instruction execution, will be

    [rI1] = - 00 01
    [rI3] = + 00 03
    [12] = - 01 02 03 04 05

To further illustrate loading operators, the following table shows the contents of ‘`rX`’ after different ‘`LDX`’ instructions:

‘`LDX 12(0:0) [rX] = - 00 00 00 00 00`’
‘`LDX 12(0:1) [rX] = - 00 00 00 00 01`’
‘`LDX 12(3:5) [rX] = + 00 00 03 04 05`’
‘`LDX 12(3:4) [rX] = + 00 00 00 03 04`’
‘`LDX 12(0:5) [rX] = - 01 02 03 04 05`’